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  1. A Unified Approach for Timing Verification and Delay Fault Testing A Unified Approach for Timing Verification and Delay Fault Testing

    A Unified Approach for Timing Verification and Delay Fault Testing

    Andrzej J. Strojwas
    Springer US, Springer US
    30.11.1997

    Large system complexities and operation under tight timingconstraints in rapidly shrinking techno...

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    106,99 €
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  2. A Unified Approach for Timing Verification and Delay Fault Testing A Unified Approach for Timing Verification and Delay Fault Testing

    A Unified Approach for Timing Verification and Delay Fault Testing

    Andrzej J. Strojwas
    Springer US
    13.09.2012

    Large system complexities and operation under tight timingconstraints in rapidly shrinking techno...

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    106,99 €
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  3. VLSI Design for Manufacturing: Yield Enhancement VLSI Design for Manufacturing: Yield Enhancement

    VLSI Design for Manufacturing: Yield Enhancement

    Stephen W. Director
    Springer US, Springer US
    30.11.1989

    One of the keys to success in the IC industry is getting a new product to market in a timely fash...

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    160,49 €
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  4. VLSI Design for Manufacturing: Yield Enhancement VLSI Design for Manufacturing: Yield Enhancement

    VLSI Design for Manufacturing: Yield Enhancement

    Stephen W. Director
    Springer US
    21.09.2011

    One of the keys to success in the IC industry is getting a new product to market in a timely fash...

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    160,49 €
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